Implementation of TCP / IP protocol on AT91RM9200
Abstract: The hardware interface circuit design and driver development of AT91RM9200 [1] chip and DM9161E [2] are introduced. On this basis, the TCP / IP [3] layered implementation method is discussed, and simplified according to the actual situation. Finally, TCP is discussed in detail
The specific implementation process of the / IP protocol on AT91RM9200.
Keywords: TCP / IP protocol; AT91RM9200;
Implement TCP / IP Protocol In AT91RM9200
Lin YunBiao1 Wu Chengke1 Li Yunsong1
(School of CommunicaTIon Engineering, NaTIonal Key Lab. Of Integrated Service Networks, Xidian University., Xi'an 710071, China)
Abstract: This Paper firstly introduces the design of the hardware interface circuit of The At91RM9200 and DM9161E, and then discusses how to embed the TCP / IP protocol into the AT91RM9200; Secondly, It discusses the delaminaTIon realize of the TCP / IP protocol, and According to the needs of the applicaTIon take some measures to simplify the protocol. Finally, it describes the process of realizing TCP / IP in AT91RM9200.
Keywords: TCP / IP Protocol; AT91RM9200;
1 Introduction With the rapid development of the Internet, people's demands on the network are also increasing. Especially with the development of integrated circuits like ARM [7] low power consumption, multi-function chips continue to appear. People naturally demand to realize the Internet function on them, so that their application fields become more extensive. This article uses the AT91RM9200 ARM chip design of ATMEL and the hardware interface circuit of DM9161E, and implements the TCP / IP protocol on AT91RM9100, so that it has the Internet access function, and finally can realize online data services with other devices.
2 Chip Introduction AT91RM9200 is a chip-on-chip system based on AT920T processor introduced by ATMEL Company, which integrates a wealth of standard interfaces, including USB master / slave device interface, serial port, 10 / 100M Ethernet media access controller, SPI, TWI [1], extended bus interface (EBI [1]), etc. AT91RM9200 embedded Ethernet controller can work in half duplex or full duplex mode at 10M / 100Mbps. In half-duplex mode, the controller supports IEEE802.3 CSMA / CD protocol; in full-duplex mode, it supports IEEE802.3 MAC control layer with flow control. The MAC layer of the Ethernet controller supports MII [1] (Media Independent Interface) and BDI [1] (Buffered DMA Interface), MII complies
Follow the media independent standard of ISO / IEC802.3 where the physical layer and MAC layer are separated. The physical layer interface (PHY) completes the encoding and decoding of all input and output data: 10Base-T uses Manchester encoding, 100Base-X uses 4B / 5B encoding, and 100Base-T4 uses 8B / 6T encoding. When receiving data, MII receives the original data packet with CRC added at the prefix and at the end. When sending data, MII adds a prefix and CRC at the end to the packet, and the MAC layer also generates padding data and passes it to the PHY.
DM9161E is a physical layer transceiver launched by DAVICOM that can work at 1000BASE-TX and 10BASE-TX. In terms of media, it provides an interface directly with unshielded Category 5 twisted pairs. Through the MII interface, DM9161E can communicate with the MAC layer of AT91RM9200.
3 Hardware design
The hardware interface circuit of AT91RM9200 and DM9161E is shown in Figure 1:
Figure 1 Hardware interface circuit of AT91RM9200 and DM9161E In this system, AT91RM9200 integrates an Ethernet controller (EMAC), DM9161E is responsible for physical layer communication, and HR901103A is responsible for level filtering and shielding of five types of twisted pair interfaces.
As shown in Figure 1, AT91RM9200 and DM9161E communicate through the RMII interface. The PA15 / EMDC and PA16 / EMDIO of AT91RM9200 are respectively connected to MDC [1] and MDIO [1] of DM9161E, so that the internal registers of DM9161E can be operated, including the configuration of DM9161E physical address and subnet mask.
PA10 / ETX1, PA9 / ETX0, PA8 / TXEN are connected to TXD1, TXD0, TXEN of DM9161E to control data transmission.
PA13 / ERX1 and PA12 / ERX0 are connected to RXD1 and RXD0 of DM9161E to receive data. AT91
RM9200's NRST connects to DM9161E RESET pin to reset DM9161E synchronously.
DM9161E's MDINT connects to the PC4 of AT91RM9200 to realize that when the DM9161E receives enough network packets, it sends a reception interrupt signal to the AT91RM9200 Ethernet controller, informing AT91RM9200 to process the received data.
Connect RXEN of DM9161E to high level, indicating that the reception is always valid. While TXEN is controlled by AT91RM9200, only data is valid.
PA11 / ECRSDV and PA14 / ERXER of AT91RM9200 are connected to RXDV and RXER of DM9161E respectively, and can monitor the status of the received data.
4 Software design
4.1 Device driver design The device driver design includes the following parts:
(1) Device initialization: In order for the DM9161E to send and receive data, its internal registers must be configured. These configurations include physical addresses and IP addresses. In order to implement the entire TCP / IP protocol, there is also a timer.
(2) Interrupt service program: Since there is no data in the network service is unknown, there must be an interrupt service program, which is responsible for processing the DM9161E to send an interrupt request to the AT91RM9200EMAC controller when receiving data packets, and analyze each data packet The packet type is sent to the corresponding upper protocol layer.
(3) Frame data transmission: In order to enable data transmission on the network, the data from the IP layer must also be framed. Add the Ethernet address of the receiving end, the Ethernet address of the sending end, the type of service, and the calibration before each data packet Check the code. Then send the framed data packet to the DM9161E send buffer, configure the corresponding send register: send packet buffer address, data packet length. After writing the length register, the DM9161E starts to send.
(4) Frame data reception: analyze the data packet sent by the interrupt service program, and if it is an ARP packet, give it to the ARP module for processing. If it is an IP packet, send the packet to the IP module for processing.
4.2 Specific implementation of TCP / IP Due to the rich memory resources of the traditional PC and multi-tasking system, the complete TCP / IP protocol can be implemented on the traditional PC. However, in the embedded system implemented by AT91RM9200, due to the limitation of memory and processing speed, it is impossible to achieve complete TCP / IP. Therefore, TCP / IP must be simplified according to the actual situation. This paper implements ARP, IP, ICMP, UDP and TCP on AT91RM9200, and simplifies them by layer (shown in Figure 2).
Implement the ARP protocol at the data link layer. The module consists of ARPRequest, ARPInput, ARPTimer. ARPRequest is responsible for the host sending an ARP request to determine the Ethernet address of the destination address when sending data to the network. ARPInput judges that the type of ARP packet is a request packet sent by another machine on the network or a response packet sent back to the machine, judges its legality and performs corresponding processing. If it is a request packet, the Ethernet address and the IP address of the destination address and the source address are exchanged, and then the check code is calculated, packaged and sent. If it is returned to the local ARP response packet, the IP address in the data packet is stored in the routing table, so that the destination Ethernet address can be queried when sending data in the future.
Realize IP agreement and ICMP agreement in the network layer. The IP module is composed of IPInput and IPoutput. IPInput is responsible for receiving IP data packets, and IPoutput is responsible for sending IP data packets. IPInput first determines whether the version number, checksum, and IP header length are correct. If it is incorrect, the data packet is discarded. On the contrary, it determines whether the destination address is the IP address of the current host.If it is not, it will look for the destination address in the routing table. If it is found, the data packet is forwarded. If the destination address is the current host IP address, the type of data packet is judged. If it is an ICMP, it is sent to the ICMP protocol layer; if it is a TCP packet, it is sent to the TCP protocol layer. IPoutput is responsible for sending IP data packets, receiving the data passed by the upper layer protocol, plus the 20-byte IP header, correctly setting the source and destination IP addresses, protocol type, calculating the checksum, and handing it to the link layer below. The ICMP protocol is responsible for transmitting error messages and other information that needs attention, and the type of information is determined by the 8-bit type field and 8-bit code field in the ICMP header. In AT91RM9200, only the echo request (type code 80) message processing is realized. After receiving the ICMP packet from the IP layer, it is judged whether the type code segment is 80. If these two fields are set to 00 (echo response), the checksum is calculated and then handed over to the IP layer to send; if not, it is discarded; thus supporting the ping function.
Implement the TCP protocol on the transport layer. It provides a reliable connection-oriented byte stream service. It is mainly composed of TCPInput, TCPOutput, TCPTimer, and TCB queues, and is simplified according to specific needs. The TCP control block TCB is implemented by a structure. Each TCB contains all the control and status information of a TCP connection. All TCBs form a doubly linked list, which is conducive to searching in all TCP connections. TCPTimer is responsible for managing various state information in the TCP protocol and refreshing each TCB state regularly. Here, only a 500ms slow timer is implemented [5]. TCPInput is responsible for receiving the TCP data packets received from the lower-level IP module, and branching according to the status information of the TCP connection and the various flag bits of the TCP header, handing over the data to the upper-layer application program of the corresponding port, and calling other functions to implement the TCP packet Response and state changes. TCPOutput is responsible for sending TCP packets.When receiving upper-layer application data, it first sends a SYN [4] frame to establish a connection with the target host three-way handshake, and then adds the TCP header to the lower-level IP module to send, and timing through retransmission The device implements functions such as timeout retransmission, continuous timer sending window detection frame, etc. After all data is sent and confirmed, it sends a FIN [4] frame, and the connection is closed by a four-way handshake. TCPOutput can also be The program call sends other TCP messages such as ACK frames and RST frames; on a PC, it is often possible to maintain multiple TCP connections at the same time; but on ARM, only one TCP connection is supported due to the limitations of ARM speed and RAM capacity; this greatly simplifies The complexity of the program also meets the actual needs.
Figure 2 TCP / IP architecture on AT91RM9200
5 Conclusion In informationization today, Internet technology provides great convenience for people's life, work and communication. It not only solves the information exchange between people, but also solves the information exchange between enterprises. Internet technology has now penetrated into electronic devices in daily life such as video surveillance. Colleagues in the information circles of various countries are paying attention to and studying the connection between electronic devices and the Internet. The research of TCP / IP protocol in the ARM network solves the problem of the connection between the ARM-based processing system and the Internet, and opens up a broader prospect for the application of ARM devices.
references:
[1] ATMEL AT91RM9200 datasheet.2003
[2] DAVICOM DM9161E datasheet.2001
[3] Douglas E. Comer. TCP / IP for Internet Interconnection (Volume 1). Translated by Lin Yao and others. Beijing Electronics Industry Press. 2001
[4] Wang Gang, edited by Lin Lizhi. TCP / IP programming based on Windows. Beijing: Tsinghua University Press, 2000
[5] W. Richard Stevens. TCP / IP Illustrated, Volume 1The Protocols. 2001
[6] Gary R. Wright, Wright Gary R., W. Richard Stevens, TCP / IP Illustrated, Volume 2: The Implementation, 2001
[7] Du Chunlei. ARM Architecture and Programming. Beijing: Tsinghua University Press, 2003
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