Radio frequency identification (RFID) technology has been widely used in all aspects of life, and its security has become a major challenge. Researchers at the Massachusetts Institute of Technology (MIT) and Texas Instruments (TI) have adopted three major design techniques to solve the "bypass attack" problem most commonly faced by RFID tag chips and significantly improve the security of RFID.
The bypass attack is to obtain the bypass information (such as power consumption, electromagnetic radiation, duration) that the key device leaks during the encryption and decryption operation, and analyze the key key by statistical processing. The bypass attack is based on the correlation between the physical information released by the encryption device and the operations performed and the data being operated. It has nothing to do with the specific hardware devices and encryption algorithms, and has the characteristics of high attack efficiency and simple implementation.
A single encryption and decryption process can only reveal a small amount of information. To obtain a complete key, multiple encryption and decryption processes need to be performed on the same key to obtain enough leak information. To do this, the researchers added a random sequence generator to the RFID tag chip, which changed the key after each transaction, while running the same sequence generator on the central server, and first legally reading the RFID chip information. Sexual verification.
Since the RFID tag is mainly powered by the reader, the method of adding a random sequence generator cannot cope with the "powerglitch attack", that is, the attacker cuts off the power supply before the new key is generated, so that the chip is restored. The old key will still be used afterwards. By repeating the operation, the attacker can force the chip to work under the same key until it accumulates enough information for the bypass attack. To this end, the researchers took two measures, one is to add "on-chip power" to ensure continuous power supply, and the other is to use non-volatile memory cells to store data that the chip is processing before power-off.
In "on-chip power", the researchers used a set of 3.3V capacitors to store power. After the power supply is cut off (the reader is removed), the chip can continue to perform a number of predetermined operations and then send the data to 571 different 1.5V memory locations. After power is restored, the 3.3V capacitor is first charged, then the data previously sent to the 1.5V memory bit is retrieved, and the previously interrupted operation is continued, thereby invalidating the "power pulse attack".
In terms of non-volatile memory cells, researchers have used ferromagnetic crystals. The central atom can move in the crystal along the direction of the electric field when an electric field is applied, and cause a charge breakdown when passing through the energy barrier. The breakdown can be induced and recorded by the internal circuit. When the electric field is removed, the central atom remains stationary. Achieve non-volatile storage of data. TI is one of the world's leading producers of ferroelectric random access memory (FRAM).
Although each time the power supply is restored, the 3.3V capacitor is first charged and the previously unfinished calculations are completed. However, the chip can still achieve a reading speed of 30 times/second, which is faster than most RFID at this stage. chip.
TI has produced the prototype of the chip and tested its anti-intrusion performance to meet expectations. The research results have been presented at the 2016 International Solid State Circuits Conference (ISSCC). The study was funded by TI and Japan's Denso.
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