Abstract: This article mainly introduces the application of high voltage and high power step-down DCDC chip AP2953 on ARM-based netbooks, as well as the structural characteristics, application design and application characteristics of AP2953.
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With the increase and popularity of network speeds, netbooks with low price and long battery life are increasingly favored by consumers. The ARM-based netbook has attracted the attention of many manufacturers and consumers due to its small size, light weight, low cost, low power consumption, long-lasting endurance, and simple production and maintenance. Freescale, Texas Instruments, TI, Anyka, Samsung and other companies based on ARM architecture gradually occupy a certain market. ARM architecture netbooks are usually powered by two or three lithium batteries, converted to 5V by high-efficiency step-down DCDC, and then converted to 3.3V, 2.5V, 1.8V, 1.2V and other voltages to supply various parts of the system. The ARM architecture netbook power supply structure is as follows:
Figure 1: The netbook power supply structure of the ARM architecture.
Highlighting the long-lasting endurance advantages of netbooks, in addition to the need for a suitable organizational structure, each voltage rail path and device selection is also an important part. In this application scheme, the external adapter voltage or battery pack voltage is efficiently converted into the system 5V main voltage by the high-voltage high-power DCDC-AP2953, and then converted by the high-efficiency low-power DCDC-APS2406L and the high-precision low-noise LDO-AP1231. The voltage applied to each part of the system or directly supplies power to the relevant 5V module to improve the overall conversion efficiency of the power supply.
AP2953 is a high-efficiency high-voltage and high-power synchronous buck conversion chip designed by Wuxi Xinpeng Microelectronics Co., Ltd. using BCD technology developed independently for portable mobile computing and portable mobile video and communication equipment. The input operating voltage is wide from 4.75V to 23V, and the output voltage is 0.925V adjustable to 20V. The continuous load current output of 3A ensures stable operation under all conditions of the system. Its efficiency is as high as 95%, meeting the increasing energy and long-term requirements of each system. The internal oscillation frequency is 340KHz to ensure minimal EMI interference to other parts of the system. The chip also features soft start (time adjustable) and cycle-by-cycle overcurrent protection, short circuit protection and over temperature protection. The internal structure block diagram of AP2953 is as follows:
Figure 2: Block diagram of the internal structure of AP2953.
Working principle: AP2953 is a current-mode synchronous rectification step-down DCDC converter with two MOS tubes. The output voltage is divided by an external resistor and amplified by an error amplifier, and then compared with the internally detected upper tube peak current. The result determines the duty cycle of the upper tube conduction time, and the duty cycle changes control the output voltage change. Thereby the negative feedback control is completed.
Soft start process: When the power is turned on, the feedback voltage will start below 0.1V, and the system enters the 110KHz working mode. The internal current source charges the soft-start capacitor. When the SS pin voltage reaches 0.925V, the soft-start ends.
Overcurrent protection and short circuit protection: The AP2953 monitors the upper and lower tube currents during each cycle. When the output is shorted to ground, the voltage sampled by the upper current limiting resistor reaches the set current limit point, the chip operating frequency becomes 110KHz, the COMP terminal is clamped, and the chip operates in the minimum duty cycle mode.
Typical application circuit of AP2953:
Figure 3: Typical application circuit for the AP2953.
Typical working efficiency of AP2953:
Figure 4: Typical operating efficiency of the AP2953.
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