This paper designs and implements a COFDM modulator based on the DVB-T standard. In the design, FPGA of Altera's StraTIx series EP1S25F672C7 and Analog Devices' digital quadrature upconverter AD9857 are used. The system is simple in design, stable in operation, and the signal-to-noise ratio of the output signal can reach more than 55dB, and can obtain higher system performance with lower complexity.
1 System scheme of DVB-T modulator
The COFDM modulation system in the DVB-T modulator is the main part of the modulator, and it is also a good use of the anti-multipath OFDM technology in broadband wireless communication. The block diagram of the modulation system is shown in Figure 1.
As can be seen from the figure, the transmitter first decomposes the input TS code stream into two independent continuous data streams by the source demultiplexing circuit, each 188 bytes is a transmission packet; then scrambles each channel of data , RS coding, diplomatic weaving, convolutional coding, two channels are combined into one in the demultiplexing circuit (generally two streams are used in the layered mode, and the other mode only demultiplexes one channel), and then bit interleaved The encoder and symbol interleaver complete the entire channel coding. After encoding, the data is mapped and modulated onto the corresponding constellation diagram to become a data carrier. The OFDM frame forming part combines the data carrier, pilot carrier (pilot) and TPS channel transmission parameter signaling carrier according to the requirements of the frame structure to form a complete OFDM symbol and frame. According to the OFDM modulation principle, each carrier is subjected to IFFT transformation to obtain a data stream in the time domain. After that, insert a guard interval before each OFDM symbol, and then through D / A up-conversion to form an intermediate frequency signal and transmit it to the channel.
It can be seen that a COFDM modulator is mainly composed of three modules: TS code stream access, channel coding modulation and D / A up-conversion. Therefore, the quality of D / A up-conversion directly affects the performance of the modulator.
2 Principle of D / A up-conversion
Generally, the up-conversion of the modulator can adopt two schemes, analog and digital. Figure 2 is a simple analog up-conversion implementation circuit. Its principle is to use the oscillation frequency of the voltage-controlled oscillator to achieve frequency modulation. First, the input signal is mixed with the VCO and the local oscillator signal to obtain the sum and difference frequency signals; after these signals pass through the high-pass filter, the low frequency components are filtered out, and the high frequency components can be transmitted to the channel through the amplifier. Due to some inherent defects of analog circuits, such as poor anti-interference ability and low accuracy, the stability and reliability of this up-conversion implementation method are poor.
With the development of high-speed devices and software radio technology, digital up-conversion technology has gradually broken through the deficiencies of analog up-conversion, with adjustable modulation center frequency, programmable frequency deviation, reconfigurable modulation mode, high modulation code rate, and high realization The frequency response, the ability to be combined with the encoder and the strong expansion function, etc. have become the mainstream of the future development of the modulator.
At present, the commonly used digital up-conversion chips are AD9856 and AD9857. These two chips are general-purpose, high-performance digital up-conversion devices produced by AD Company. They have the characteristics of high integration, good performance, and low power consumption. A chip can easily achieve digital quadrature modulation of the signal. Compared with AD9856, AD9857 has the following differences:
(1) AD9857 integrates a 14-bit D / A converter, and AD9856 integrates a 12-bit D / A converter. In this way, AD9857 is about 6dB higher than AD9856 in terms of data accuracy.
(2) AD9856 requires 3V power supply, and the working voltage of the general microcontroller is 3.3V or 5V, so a voltage conversion chip is needed for level adaptation. The working voltage of AD9857 is 3.3V, and it can share a power supply with other chips.
(3) Since the AD9857 configuration is completed, a PDCLK signal will be generated, and the AD9856 cannot return such a signal, so the balance of the I / Q two signals sent into the AD9857 modulation is better than the AD9856, which can prevent the OFDM modulation. Carrier loss occurs.
(4) AD9857 also has an output level control function, which can dynamically adjust the output signal level according to the needs of the receiver.
In view of the advantages of the AD9857 and the specific needs of the DVB-T system, this article discusses an implementation method of digital up-conversion based on the AD9857.
3 Working principle of AD9857
AD9857 has three main working modes: quadrature modulation mode, single frequency output mode and interpolation DAC mode. The selection of the three working modes is realized by programming the control register. The quadrature modulation mode is used in this system.
In the quadrature modulation mode, the AD9857 provides a synchronous clock to the data input terminal through the pin PDCLK / FUD, which is used to synchronize the input of I / Q data. I / Q two channels of data share a 14bit data line, so the clock frequency of PDCLK should be twice the data rate of a single I or Q channel. I / Q data is sent to the on-chip DEMUX for demultiplexing to parallel. I / Q two-way data, they will pass through two interpolation filters in turn. After filtering, the I / Q data is multiplied by two orthogonal cosine functions and then added (or subtracted) to a signal. Because the DAC uses zero-order hold sampling, the signal needs to undergo an inverse SINC compensation module before the D / A conversion. The above process occurs in the digital domain. Finally, the digital intermediate frequency signal is sent to the DAC for digital-analog conversion to generate two differential Analog signal output.
The AD9857 integrates a digital direct frequency synthesizer (DDS) to generate digital sine and cosine waves as a carrier. The 32-bit frequency control word (FTWORD) of DDS is configured through the synchronous serial port. There are 4 groups of registers in the AD9857. Each group can store 32-bit frequency words. This feature allows the output carrier frequency to be changed flexibly and in time as needed. Generally, it is very difficult to make a high-quality oscillator with a frequency dynamic range of 100M ～ 200MHz, while the AD9857 allows the use of a lower frequency oscillator, which can multiply its internal reference clock to generate SYSCLK , Through the formula fout = (FTWORD & TImes; SYSCLK) / 232, the baseband signal can be modulated into an intermediate frequency signal of any frequency.
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