The visual chip is a semiconductor integrated on-chip system chip composed of an image sensor array and an array type parallel information processor. It overcomes the bottleneck of serial data transmission and serial information processing speed limitation in existing visual image systems, and can achieve high-speed image acquisition and intelligent visual information processing at a maximum speed of more than one thousand frames per second on-chip at a high speed. Target real-time tracking, machine vision, virtual reality, fast image recognition, intelligent transportation, and various types of intelligent toys have broad application prospects.
The State Key Laboratory of Superlattices, Institute of Semiconductors, Chinese Academy of Sciences has successfully developed a programmable vision chip integrating the pixel and processing unit (Journal of Solid-State Circuit (JSSC), 1470 (2008)). The chip has full-pixel parallel visual information processing. The function can complete the low-level and intermediate-level visual image processing based on the mathematical morphology method, and can achieve high-speed target tracking and image feature extraction.
With the support of the National Natural Science Foundation of China, the Ministry of Science and Technology, and the Chinese Academy of Sciences, in the last two years, Wu Nanjian, a researcher at the Institute of Semiconductors, doctoral students Zhang Wancheng and Fu Qiuyu have conducted in-depth studies and developed a new type of visual chip. The chip has the architecture features of separation of image sensor pixel array and processing unit array circuit, and integrates three processors with different degree of parallelism: two-dimensional processing unit array, one-dimensional row parallel processor array and embedded microprocessor, respectively , intermediate and advanced image processing functions. Successfully resolved the contradictions between the image resolution, processing functions, processing speed, and chip area, and implemented sophisticated high-level image processing functions such as high-speed image recognition on the chip, which enables the tracking of the visual chip at high-speed targets, robot vision, and rapidness. The application of such fields as image recognition laid a good foundation.
The State Key Laboratory of Superlattices, Institute of Semiconductors, Chinese Academy of Sciences has successfully developed a programmable vision chip integrating the pixel and processing unit (Journal of Solid-State Circuit (JSSC), 1470 (2008)). The chip has full-pixel parallel visual information processing. The function can complete the low-level and intermediate-level visual image processing based on the mathematical morphology method, and can achieve high-speed target tracking and image feature extraction.
With the support of the National Natural Science Foundation of China, the Ministry of Science and Technology, and the Chinese Academy of Sciences, in the last two years, Wu Nanjian, a researcher at the Institute of Semiconductors, doctoral students Zhang Wancheng and Fu Qiuyu have conducted in-depth studies and developed a new type of visual chip. The chip has the architecture features of separation of image sensor pixel array and processing unit array circuit, and integrates three processors with different degree of parallelism: two-dimensional processing unit array, one-dimensional row parallel processor array and embedded microprocessor, respectively , intermediate and advanced image processing functions. Successfully resolved the contradictions between the image resolution, processing functions, processing speed, and chip area, and implemented sophisticated high-level image processing functions such as high-speed image recognition on the chip, which enables the tracking of the visual chip at high-speed targets, robot vision, and rapidness. The application of such fields as image recognition laid a good foundation.
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