LED Synchronous Screen Control System Based on Network Port Transmission and Its FPGA Implementation

LED full color synchronous control system has the advantages of high-performance real-time display, energy saving and environmental protection, and has become an important media for modern information release. This design changes the traditional design to capture the VESA signal interface of the graphics card, use the parallel multi-bus to transmit data, use the DVI interface to collect data, and transmit data through the network port, which not only saves cost but also improves transmission efficiency and transmission quality. In addition, the design also uses a series of new technologies, such as the use of highly integrated FPGA as the main control module, the use of large-capacity SDRAM instead of high-cost equivalent capacity SRAM, the use of signal packet multiplexing technology to synchronously transmit display data and control data, using high Efficient grayscale slicing algorithms and more. LED synchronous screen control system has the characteristics of low cost, large display area, stable display and high refresh rate. It is a very competitive display control solution on the market.

1, system principle and structure

The overall architecture of the system is shown in Figure 1. It consists of two main components: the sample transmission board (STR) and the field control board (FRC). Through large-scale logic and other components, real-time synchronous acquisition of the display data output by the computer, through the cache, format conversion, transmission from the large-capacity transmission channel to the LED display site, and finally converted into LED scanning control signal, on the LED display Realize the display of high-definition video, pictures, text and other program content.

Figure 1 system composition diagram

1.1 Display signal acquisition

This design collects high-definition display data signals from the DVI interface of the computer. DVI mainly transmits digital signals based on the Transition Minimizerl Differential signing (TMDS) technology. TMDS uses an encoding algorithm to convert 8 tit (24-bit color RGB data, 8 bits each) into 10 bit data (including line sync information, clock information, data DE, error correction, etc.) by DC conversion encoding, and is used in DC After balancing, the differential signal is used to transmit data. It has better electromagnetic compatibility than LVDS and TTL, and can realize long-distance, high-quality digital signal transmission with low-cost dedicated cable. This system uses a dedicated TFP401A chip. The TMDS signal outputted by the DVI interface of the computer display card is converted into a TTL three-color separated data signal of a TTL level.

1.2 Display data format conversion

The display signal of the DVI interface for high-speed input is serial gray-scale data. Taking 24-bit color data as an example, the weight data of each color is 8 bits, that is, the gray level is 256 (28). The grayscale implementation on the LED display is achieved by controlling the lighting time of each LED, ie the duty cycle. In order to achieve different gray levels more efficiently, the design uses a full screen for each weight independent display. That is, the entire screen is controlled to display the brightness of 1 to 8 weights.

The entire data format conversion process is implemented by the acquisition of two FPGAs on the transmitter board and the field control board and the SDRAM of the data buffer. Through a series of processes such as weight separation-cache-partition extraction-data reforming, the scan data of the LED display screen is finally obtained.

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