NI X Series Multifunction Data Acquisition Equipment New Features

National Instruments Corporation (NI) recently launched a new generation of multi-functional data acquisition products X series data acquisition card (Figure 1), is also the third generation of this category. As one of the most important products of NI, multi-functional data acquisition equipment has always attracted much attention. When the second-generation M-series was launched, it caused a huge sensation. Its functions and features have been significantly improved compared to the first-generation E-series. For many years now, it has maintained a very good sales and reputation, satisfying all kinds of test industries. Demand has created a brilliant future. So can the X series continue the advantages of the M series? Can we continue to maintain the leading position of similar products under increasingly fierce market competition and meet more measurement needs? Compared with the M series, what performance has improved?


Figure 1 X Series Multifunction Data Acquisition Products

PCIe bus

In the M series products, the bus types are both PCI and PCIe, and there are more types of PCI. In the X series, only the PCIe bus products are no longer available to support PCI bus products. The PCI (Peripheral Component Interconnect) bus is a standard that was defined by Intel Corporation in 1991 to define a local bus. It is one of the most used internal buses. The earliest proposed PCI bus operates at a frequency of 33MHz and the transmission bandwidth is 133MB/s (33MHz*32bit/s). At present, the theoretical bandwidth can reach up to 1G. PCI Express is a bus architecture released in recent years. It adopts a point-to-point serial connection. Compared with PCI's shared parallel architecture, each device can have its own dedicated connection and does not need to request bandwidth from the entire bus. The data rate is increased to a very high frequency to achieve the high bandwidth that PCI cannot provide. Compared to the traditional PCI bus, which can only implement unidirectional transmission in a single time period, the dual simplex connection of PCIe can provide higher transmission rate and quality. The difference between them is similar to that of half duplex and full duplex. Each line of the PCIe connection contains two pairs of wires, one for transmitting and the other for receiving. Packets are transmitted between lines at a rate of one bit per cycle. ×1 connection, the smallest PCIe connection, has a line of four wires. Each party transmits one bit per cycle upward. The ×2 link contains eight wires, two bits at a time, four bits for a ×4 link, and so on. Other configurations include x12, x16, and x32. X-Series PCIe boards belong to the ×1 connection (Figure 2).


Figure 2 Example of a PCIe connector

The main advantage of the PCIe bus is the high data transfer rate, which can reach a maximum speed of 10 GB/s or more, and there is still considerable potential for development. The cost of motherboard production is lower than that of PCIe using PCIe, and PCIe and PCI are fully compatible and applicable to current operating systems. Therefore, in the near future, PCIe will replace PCI to become the new generation universal bus interface, and X series can still be applied. In a new generation of PC motherboards (Figure 3). The X-Series PCIe products have a bandwidth of 250M/s.


Figure 3 PCI bus and PCIe bus (white long interface is PCI interface, short interface is PCIe interface)

Higher sampling rate and accuracy

The products of the X-series PCIe bus still select the working mode of all AI channels to multiplex one ADC. The multi-channel polling collection saves the user's cost. In multi-channel switching, the X-series ADCs have only one-fifth of the settling time of the M series, which is only 10 ns, and can even meet some of the less demanding synchronous acquisitions.

As we all know, the absolute accuracy of the data acquisition card is not only equivalent to the resolution, but also related to multiple parameters such as offset error and gain error. The resolution of the ADCs used by the X series is still 16 bits, but the accuracy of each range has been greatly improved compared with the products of the same resolution of the M series, making the test more accurate. Tables 1 and 2 below show the comparison of the accuracy of the same class of boards in the M series and X series.


Table 1 M Series 622X Range Accuracy Table


Table 2 X-Series 632X Range Accuracy Table

The X-series product sampling rate also offers more options, with a single-channel sampling rate of 250K, 500K, 1.25M, and 2M for 16-bit resolution products (Table 3). In terms of other analog input performance, the X-series common-mode rejection ratio has also been improved, and the computer passes data to the default sampling DMA mode, and no longer supports the interrupt mode. All details of changes are to make the board to achieve better performance and meet more and more high test requirements.

performance

product

Sampling Rate

Analog input

Update rate

Analog output

Digital I/O

Counter

PCIe-6320

250K

16

0

0

twenty four

4

PCIe-6321

250K

16

900K

2

twenty four

4

PCIe-6323

250K

32

900K

4

48

4

PCIe-6341

500K

16

900K

2

twenty four

4

PCIe-6343

500K

32

900K

4

48

4

PCIe-6351

1.25M

16

2.86M

2

twenty four

4

PCIe-6353

1.25M

32

2.86M

4

48

4

PCIe-6361

2M

16

2.86M

2

twenty four

4

PCIe-6363

2M

32

2.86M

4

48

4

Table 3 X-series PCIe products (sampling rate is the highest achievable sampling rate for single-channel acquisition)

X-series AO compared with M-series products of the same grade, the update rate has improved, there are two kinds of 900K and 2.86M can be selected, the DAC's settling time from the original 50ns to 10ns. In addition, X series products have also improved overcurrent protection and glitch protection during power-off.

X-Series products AI and AO have 1 DMA channel responsible for data transfer with the PC.

NI STC3 chip

The X series has greatly improved the functions of digital I/O and Counter, mainly due to the use of a new generation of system timing control chip NI STC3.

On-board time base is especially important for data acquisition cards. The internal timing setting the sampling rate requires the on-board time base to generate the clock frequency, and setting the trigger signal requires the on-board time base to lock the digital edge. The NI STC3 technology uses a 100 MHz timebase to set timing for analog and digital tasks. The speed is five times that of the M series cards, which means that the sampling rate can be exactly 5 times faster and the response time of one trigger can reach 10ns.

The STC2 chip used in the M series provides two 32-bit, 80 MHz Counters that can measure various information of the TTL pulse signal such as period, frequency, edge interval, etc., and generate pulses. NI STC2 is also a chip that directly supports quadrature encoders. It can directly connect A, B, and Z of the encoder to the Source, AUX, and Gate ports of the counter. It is very convenient to directly read the angle or displacement information through configuration parameters. The functions of the NI STC3 are further advanced in the STC2 and provide four 32-bit, 100 MHz enhanced Counters. Each enhanced Counter can even complete the work of 2 counters of past M Series products through an internal embedded counter (Figure 4). For example, controlling a stepper motor requires generating a finite number of digital pulses. In the M series, we use a counter to continuously generate pulses, and the other controls the first Counter's Gate signal to determine when it is sent to the motor. The single Counter in the X series can accomplish this task, which means that an X series card can control four stepper motors at the same time. Similarly, X-Series board products have a dedicated DMA channel for each Counterer and are responsible for data transfer between PCs, eliminating the need for CPU resources.


Figure 4 M Series Counter (Left) vs. X Series Counter Chips

In the past, the timing and triggering functions often required counter or external signal routing on the board, while using NI STC3 technology can provide different sampling clocks and trigger signals for analog I/O, digital I/O, and counter I/O channels, respectively. . M Series products only Counter can achieve hardware timing trigger, so when we need to re-trigger acquisition, we usually need to use a Counter to repeatedly generate a finite pulse sequence, and this pulse sequence as AI clock source, control the AI ​​to collect (created through software repeat Resampling is slow when ending a task and it is easy to lose the trigger signal. While the X series uses NI STC3 technology, the AI ​​channel can be directly set and independently retriggered for sampling without relying on the Counter. X series products can also directly set the sampling clock on the DIO port to collect and generate digital waveforms. This is also required by the cooperation of Counter in M ​​series cards.

The X-Series Counter's on-board FIFO has increased from 1 sample per channel to 127, enabling many buffered pulse outputs or measurements. This is not possible with the M series cards. The buffered Counter output allows the user to write multiple pulse cycles that need to be output into the buffer in advance. This allows the generation of complex pulse waveforms with multiple frequency square waves. This information includes the pulse width, delay time, frequency, duty cycle, etc. of the pulses in each cycle, and determines how many internal or external time base representations each pulse requires.

Pulse sequences can be output in two ways, implicitly, and using the sampling clock. When using implicit timing, the pulses in the buffer will be automatically sent out in sequence. The user can customize the output of the pulses in the buffer one time or continuously (Figure 5). M Series data acquisition cards usually use this method to generate pulses.


Figure 5 implicit timing generation pulse

The X series also supports pulse generation by setting the sampling clock. This method requires setting a clock source. When a clock arrives, it continuously outputs a pulse in the buffer until the arrival of the next sampling clock edge. Then the Counter continuously outputs the second pulse in the buffer, so that the cycle continues, once or The pulse in the buffer is output repeatedly (Figure 6).


Figure 6 Setting the sampling clock to generate a pulse

When the M Series product performs buffered Counter measurements, it selects implicit timing or sets the sampling clock timing as required. If it is a buffered edge count, it can support setting the sampling clock to control the counter's Gate signal to read the data into the buffer. If you want to measure the cycle or frequency information of the pulse, you need to use the implicit timing method. The user chooses to implicitly notify the NI DAQmx driver that the measured frequency or period value will be latched into the buffer after each cycle of the input signal.

The NI STC3 technology also improves the performance of buffered Counter measurements. It is also supported to set the sampling clock in addition to the implicit timing method when measuring the pulse period or frequency. Setting the sampling clock timing method to measure the period or frequency actually references an internal time base to compare unknown measurement signals. When a sample clock signal arrives, it will calculate how many rising edges of the internal time base have occurred between the previous sample clock signal. Since the referenced internal time base frequency is known, the two sample clock signals can be accurately calculated. The number of cycles between the time and the unknown signal divided by this time is the average frequency of the signal. These calculations are performed automatically by the chip and the measured frequency or period value is written directly into the buffer. The referenced internal time base is obtained by automatic frequency division of the internal crystal on the board, but the sampling clock must be set by the user.


Figure 7 Counter Measurement Setting Sample Clock

NI STC3 technology enables the X series to add many new features to the digital I/O and PFI ports. The watchdog timer can be set by the software to set the digital output security status to prevent the system from crashing or hardware damage when the X series product is connected to an external device. When using the watchdog function, the X series board needs to constantly receive the watchdog reset instruction. If the instruction is not obtained within the specified time, the digital output will be set to a safe state set by the user in advance, and the device will All digital writes are ignored until the watchdog is cancelled or the device restarts. The edge detection function in M ​​series is limited to Port0, and each port of the X series has this function. Digital filtering can be set on the PFI port of the M series products, but only a fixed minimum pulse width of 3 levels can be selected (Table 4), and the X series can be used to customize the minimum pulse width, which is only an integral multiple of the onboard crystal oscillator. Can (Table 5). In addition, X series products also provide 3 levels of digital filtering on digital I/O lines.


Table 4 Digital filter selection for M series PFI ports

Table 5 X series PFI digital filter selection

The X series boards have added two timing engines for digital input and digital output. In past M series products, if you set timing tasks for DIO, you need to refer to the sampling clocks of other channels, such as the sampling clock of AI or the output of Counter. This use method is called related digital I/O. X-Series products can now perform digital waveform output or acquisition independently, which not only saves other board resources, but also allows different sampling rates for DIO configuration and other channels.

X-series products DI and DO both have 1 DMA channel responsible for data transmission with the PC.

Support multi-core CPU parallel thread driver

X-series capture cards require NI DAQmx 9.0+ driver support. High-performance drive and application software can better demonstrate the superior performance of DAQ hardware to support multithreaded parallel work. NI DAQmx provides simple and convenient multi-state API functions to meet various measurement and control requirements. Support for multi-threading means that multiple tasks can be configured to work simultaneously in the same program. These API functions can be called not only by LabVIEW and CVI, but also by many third-party software such as C/C++, Visual Basic and .NET platform programming tools. Versions of LabVIEW 8.6 and later support multi-core PC programming. Simply place multiple While Loops directly in the program. LabVIEW automatically allocates threads and makes full use of the CPU.

NI DAQmx9.0 is also optimized compared to previous NI drivers. The most significant addition is the addition of the following two powerful features:

Quick and easy data storage: We often need to quickly and efficiently save the collected data. NI DAQmx9.0 provides the DAQmx Configure Logging.vi API function. Simply add this VI to the collected task to capture the collected data. Save to TDMS format file is very simple. This way of writing TDMS files makes the speed of storing data into the disk also optimized. Theoretically, the fastest speed can reach 1G/s.

Support for configuring multiple device tasks: We can more easily synchronize multiple X Series devices. The two PCIe X series capture cards are connected through the RTSI bus. Only one thread is created in the software. The channel names of the two devices that will be used when configuring the channel are written, and the set sampling clock can be automatically shared to achieve synchronization. The purpose (Figure 8).


Figure 8 Multiple X Series Board Configuration Synchronization Tasks

In order to facilitate the user in the test system to upgrade past products, such as M series data acquisition products. The ports and pins of the X series capture cards still use the consistent standard of multi-function data acquisition products. They use the 68-pin connector and the external accessories are still the cables and terminal boxes used in the M series, which can achieve direct replacement.

The above lists some of the new features of NI's next-generation X Series multifunction data acquisition products. For a long time, NI has always maintained a leading position in the industry by continuously innovating technologies, setting off a technological revolution in the test and measurement industry. Using X Series multi-function data acquisition products can help you quickly establish a safe, stable, accurate and cost-effective measurement and control system, but also hesitate what? I look forward to your right choice.

Click to view the NI X Series Multifunction Data Acquisition Equipment Product List and Pricing >>

This entry was posted in on